1. Field of the Invention
The present invention relates generally to interface devices for data processing and communication systems. The invention relates more particularly to serial I/O devices. Yet more particularly, the invention relates to programmable serial I/O devices.
2. Related Art
Many serial interface devices, also called serial input/output (I/O) ports, arrangements are known in the field of electronic circuits and systems. Implementations include application-specific circuits, Universal Asynchronous Receiver Transmitter (UART) devices, microprocessors with software controlled serial ports, and numerous others. Such devices are used for a wide range of applications, including communication with display devices, communication with so-called xe2x80x9csmartxe2x80x9d batteries for battery management, providing access to a system for debug, providing a connection to a synthesizer, communication with a modem, or serving as a universal system connector (USC). Numerous standards have been promulgated, supporting the various applications for serial I/O ports by defining the specific desired physical configurations thereof. The parameters defined can include the number and type of signal paths, the timing of signals carried by the various signal paths and other characteristics such as amplitude, polarity and encoding method of the signals and signal paths.
A designer generally selects a non-programmable serial I/O ports solution on the basis of the match between the standard or custom serial I/O ports configuration the designer desires to implement and the devices available. For example, a UART meeting certain speed and timing requirements may be selected for a particular asynchronous application.
In designs requiring greater flexibility than afforded by non-programmable devices, a software programmable serial port of a conventional microprocessor may be used. For example, the Motorola M68HC11 family of microcontrollers includes a serial port known in the art as the Motorola Synchronous Serial Peripheral Interface (SPI). Such a configuration is generally shown in FIG. 1. The microcontroller 100 includes serial hardware 101 controlled by software 102, which may also communicate with a system bus 103. Serial communications occur over signal paths 104. However, such serial interfaces are disadvantageous because of several factors. Even in interfaces that are software controlled, like the SPI interface, the electrical parameters, numbers of signal paths, type of signal paths, etc. are predefined and inflexible. The processor 100 must execute a software program 102 to control the serial port, and all serial data to be sent over signal paths 104 passes through the processor 100, thus additionally loading the processor 100, above whatever load is imposed by the task for which the processor 100 is principally employed. Also, because the serial hardware 101 is a power-consuming part of the processor 100, additional power is consumed whenever the processor is executing a software program.
Therefore, it is a general object of embodiments of the present invention to provide an improved serial interface device. Particular embodiments of the invention include programmable serial I/O devices. Some embodiments of the invention may have a particular advantage in that only one programmable set of hardware is required to provide a serial interface according to any of several standard and non-standard configurations. Thus, for example, should different customers for a system require different serial interface configurations for I/O, only one set of system hardware need be designed, a device embodying the invention then being programmed to implement the serial interface configuration required for each customer, including signal paths, signal types, timing, etc.
In a system including a system bus, an interface device embodying aspects of the invention may be connected to the system bus separate from any data processor. The interface device may comprise a bus interface connected to the system bus, a programmable state machine (PSM) connected to and responsive to the bus interface, a serializer connected to the PSM and to the bus interface, and having a serial I/O port, the serializer responsive to the PSM to transfer data between the bus and the I/O port in accordance with a selected serial protocol. Variations of this embodiment are also possible. For example, the interface device may further comprise a clock controller connected to the bus interface and connected to the PSM. The clock controller may be responsive to the bus interface and the PSM to generate a clock signal on an output connected to the serializer and to the PSM. The clock controller may turn off the clock signal for a programmable period of time responsive to a PSM command, thereby reducing power consumed by the device. The clock controller may turn off the clock signal responsive to a PSM command and turn on the clock signal responsive to a signal received at the I/O port of the serializer, thereby reducing power consumed by the device when it is not communicating on the I/O port of the serializer. The interface device may further comprise a bit counter having an input and an output, each connected to the PSM and the bit counter controlled by the PSM. The PSM may further comprise a memory capable of storing a program defining operation of the interface device, and instruction execution logic responsive to the program stored in the memory, the instruction executing logic producing on signal paths connecting the PSM and the serializer control signals through which the PSM controls the serializer. The serializer may further comprise plural I/O signals defining the serial I/O port, whose functions are defined by execution in the PSM of the program in the PSM memory. The plural I/O signals may further comprise a data signal whose signal characteristics are defined by the program. The characteristics defined may include timing or the data encoding method. In general, different programs define operation of the interface device in accordance with different serial interface standards.
According to another embodiment of aspects of the invention, a method of serial communication includes providing plural, general-purpose serial I/O signals, and programming a programmable state machine (PSM) outside of a general purpose processor to cause the general-purpose serial I/O signals to operate in accordance with a particular serial communication specification. The method may further include providing a clock signal to synchronize operation of the serial I/O signals and the PSM, and selectively turning off the clock signal when not needed, thereby reducing power consumed using the method. The method may also include turning off the clock signal responsive to a PSM command and turning on the clock signal responsive to a signal received by one of the general-purpose I/O signals. The method may further include causing the plural I/O signals to operate with a defined timing or to operate with a defined data encoding method.